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more tasks than PEs, it will be difficult to achieve good load balance The exceptions to this rule are designs in which the number of tasks can be adjusted to fit the number of PEs in such a way that good load balance is maintained An example of such a design is the block based matrix multiplication algorithm described in the Examples section of the Data Decomposition pattern: Tasks correspond to blocks, and all the tasks involve roughly the same amount of computation, so adjusting the number of tasks to be equal to the number of PEs produces an algorithm with good load balance (Note, however, that even in this case it might be advantageous to have more tasks than PEs This might, for example, allow overlap of computation and communication) How are data structures shared among PEs A design that involves large scale or fine grained data sharing among tasks will be easier to implement and more efficient if all tasks have access to the same memory Ease of implementation depends on the programming environment; an environment based on a shared memory model (all UEs share an address space) makes it easier to implement a design requiring extensive data sharing Efficiency depends also on the target machine; a design involving extensive data sharing is likely to be more efficient on a symmetric multiprocessor (where access time to memory is uniform across processors) than on a machine that layers a shared memory environment over physically distributed memory In contrast, if the plan is to use a message passing environment running on a distributed memory architecture, a design involving extensive data sharing is probably not a good choice For example, consider the task based approach to the medical imaging problem described in the Examples section of the Task Decomposition pattern This design requires that all tasks have read access to a potentially very large data structure (the body model) This presents no problems in a shared memory environment; it is also no problem in a distributed memory environment in which each PE has a large memory subsystem and there is plenty of network bandwidth to handle broadcasting the large data set However, in a distributed memory environment with limited memory or network bandwidth, the more memory efficient algorithm that emphasizes he data decomposition would be required A design that requires fine grained data sharing (in which the same data structure is accessed repeatedly by many tasks, particularly when both reads and writes are involved) is also likely to be more efficient on a shared memory machine, because the overhead required to protect each access is likely to be smaller than for a distributed memory machine The exception to these principles would be a problem in which it is easy to group and schedule tasks in such a way that the only large scale or fine grained data sharing is among tasks assigned to the same unit of execution What does the target architecture imply about the number of UEs and how structures are shared among them In essence, we revisit the preceding two questions, but in terms of UEs rather than PEs This can be an important distinction to make if the target system depends on multiple UEs per PE to hide latency There are two factors to keep in mind when considering whether a design using more than one UE per PE makes sense The first factor is whether the target system provides efficient support for multiple UEs per PE Some systems do provide such support, such as the Cray MTA machines and machines built with Intel processors that utilize hyperthreading This architectural approach provides hardware support for . java barcode reader sdk Barcode in Java | Generate, Read, Scan Barcode in Java using ...
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